View LD7850GL_7747229.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ld7850 3/18/2010 1 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 high voltage step-down white led driver rev: 00a general description the ld7850 is a step-down dc/dc converter, especially designed to drive power white leds with constant current. with capability to transfer output voltage up to 60v, the ld7850 can drive a string of up to 15 series-connected power white leds and ensure uniform brightness. to optimize the efficiency, the feedback voltage is set to 0.4v. this reduces the power dispassion on the current sense resistor. the other features include under-voltage lockout, over-current protection and dimming function essential for the white led applications. ld7850 is available in a space saving msop-10 and sop-8 package. +patent pending features ? input voltage range: 12v to 70v ? hysteresis mode control ? drive one string of leds, v o up to 60v ? no need output capacitor ? analog dimming control ? over current protection ? suspend current < 1.5ma applications ? electronic appliances ? automotive led driver application ? bracket lamp and wall lamp application typical application fig. 1 application circuit
ld7850 3/18/2010 2 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 pin configuration yy: year code ww: week code pp: production code 1 8 2 3 4 7 6 5 top mark yywwpp boot vcc en vdd gate phase gnd fb sop-8 (ep) (top view) 5 msop-10 (top view) 1 10 2 3 4 9 8 7 top mark yywwpp boot vcc en vdd gate phase pgnd gnd 6 vdd fb ordering information part number package top mark shipping ld7850 gse sop-8 (ep) green pack age ld7850gse 2500 /tape & reel ld7850 gl msop-10 green package 7850gl 2500 /tape & reel note: the ld7850 is rohs compliant. pin descriptions sop-8 (ep) pin name function 1 boot this pin provides ground referenced bias voltage to the high-side mosfet driver. connect this pin to a bootstrap circuit to pump boot voltage to drive an n-mos. 2 vcc supply voltage input. vcc supplies power to step-down converter. bypass this pin to gnd with a ce ramic capacitor of at least 10 f. 3 en this pin provides both enable and dimming functions. enable function. high=enable, low=disable. dimming can be accomplished by applying analog signal to en pin. if en pin floats, a fault protection detector will disable the chip. 4 vdd internal regulator output voltage. bypass this pin to gnd with a 1 f ceramic capacitor. this pin provides the bias for the control circuitry and the high-side n-mos driver. 5 fb feedback pin. connect a resistor from fb to ground to set the led current. 6 gnd ic gnd. 7 phase inductor switching node. connect to inductor and bootstrap flying capacitor. 8 gate gate drive output to drive the high-side n-mos.
ld7850 3/18/2010 3 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 msop-10 pin name function 1 boot this pin provides ground referenced bias voltage to the high-side mosfet driver. connect this pin to a bootstrap circuit to pump a boot voltage to drive an n-mos. 2 vcc supply voltage input. vcc supplies power to step-down converter. bypass this pin to gnd with a ce ramic capacitor of at least 10 f. 3 en this pin provides both enable and dimming functions. enable function. high=enable, low=disable. dimming can be accomplished by applying either analog or pwm signal to en pin, subject to different applications. if en is floating, a fault protection detector will disable the chip. 4, 5 vdd internal regulator output voltage. bypass this pin to gnd with a 1 f ceramic capacitor. this pin provides the bias for the control circuitry and the high-side n-mos driver. 6 fb feedback pin. connect a resistor from fb to ground to set the led current. 7, 8 gnd ic gnd. 9 phase inductor switching node. connect to inductor and bootstrap flying capacitor. 10 gate gate drive output to drive the high-side n-mos.
ld7850 3/18/2010 4 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 block diagram non-overlap clk control logic block & lod detection over current inter bias & vref pre- regulator gain & shifter full lighting / dimming mode re- start boot gate phase gnd vcc en vdd fb comp 0.4v pd 9v uvlo pre- driver 1.5v 3.5v osc 500k ohm absolute maximum ratings vcc, -0.3v~75v boot pin to gnd -0.3v~82v phase pin to gnd -1.0v~75v boot pin to phase pin -0.3v~7.5v vdd pin -0.3v~7.5v fb and en to gnd -0.3v~7v gate v phase -0.3v~v boot +0.3v gate output current 500ma operating temperature range -40 c to 100 c storage temperature range -55 c to 125 c package thermal resistance sop-8 (ep) ja 50 c/w package thermal resistance msop-10 ja 160 c/w junction temperature 150 c lead temperature (soldering, 10sec) 260 c esd level (human body model) 2kv esd level (machine model) 200v caution: stresses beyond the ratings specified in ?a bsolute maximum ratings? may cause permanent damage to the device. this is a stress only rating and operation of the device at these or any other conditions above t hose indicated in the operational sections of this s pecification is not implied.
ld7850 5 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 electrical characteristics (t a = +25 o c unless otherwise stated, vcc=30v, en=5v, 4led, i led =350ma) parameter conditions min typ max units input power operating voltage vcc 12 70 v uvlo (on) 8.5 9.5 10.5 v uvlo (off) 8.0 9.0 10 v suspend current en=0, vcc=30v 820 1500 a quiescent current, i q fb=1.0v, en>4v 1.5 2.0 ma vdd internal voltage re gulator 6.7 7.1 7.5 v fb reference voltage 400 mv reference voltage tolerance (note 1) -3.0 3.0 % hysteresis window 56 mv gate/phase vdd=7.1v, output high (p-side) 10 20 driver capacity vdd=7.1v, output low (n-side) 10 20 low side driver resistance 50 en enable 1.3 v disable 0.7 v en voltage threshold full lighting mode 3.5 4.0 v impedance to gnd en pin to gnd 500 k over current trip point vcc-v phase vcc=10v 0.8 1.0 1.2 v note 1: it is case sensitivity, especially in higher voltage input combined with lower output led current case.
ld7850 6 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 typical performance characteristics 6.6 6.8 7.0 7.2 7.4 vdd voltage (v) -40 -20 0 20 40 60 80 100 120 7.5 6.5 temperature ( c) fig. 2 vdd voltage vs. temperature quiescent current (ma) temperature ( c) fig. 3 quiescent current vs. temperature -40 -20 0 20 40 60 80 100 120 1.0 1.2 1.4 1.6 1.8 2.0 suspend current ( a) temperature ( c) fig. 4 suspend current vs. temperature -40 -20 0 20 40 60 80 100 120 600 800 1000 1200 1400 -40 -20 020 40 60 80 100 120 0.38 0.39 0.4 0.41 0.42 fb voltage (v) temperature ( c) fig. 5 fb voltage vs. temperature uvlo(on) voltage (v) temperature ( c) fig. 6 uvlo(on) voltage vs. temperature -40 -20 0 20 40 60 80 100 120 8.6 8.8 9.0 9.2 9.4 9.6 9.8 10.0 10.2 10.4 en voltage threshold (enable) temperature ( c) fig. 7 en voltage threshold vs. temperature -40 -20 020 40 60 80 100 120 0.90 0.95 1.00 1.05 1.10 1.15 1.20
ld7850 7 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 fig. 8 led open circuit waveform v fb 400mv/div v gate 20v/div i led 500ma/div vdd 10v/div t-2ms/div fig. 9 over current protection function vdd 10v/div v gate 20v/div i l 1a/div v fb 400mv/div t-100 s/div application information led current program the led current is programm ed by the feedback resistor (r cs in fig.1). where the feedback reference is 0.4v, the current for driving leds could be determined by the following formula: cs led r 0.4v i = . in order to obtain accurate led current, it is preferred to use a feedback resistor with higher precision (of 1% is strongly recommended). analog dimming control the analog dimming can be achieved by applying to the en pin a voltage of a voltage level from 1.5v~3.5v to adjust the averaged led current. pulling en pin high above 4.0v will achieve the maximum brightness. over current protection (ocp) the voltage difference betwe en vcc and phas e pins will trigger ocp if it is higher than 1.0v. thus, iocp, the threshold current for triggering ocp, can be set as follows: ds(on) ocp r v 0 . 1 i = where, rds denotes the turn-on resistance of the power n-mos. the threshold current is unchangeable no matter it is under a fault condition other than an over-current condition. once the over-current condition is detected, the ic will be latched off and stop switching to protect the power n-mos and white leds. if it?s required to lower the maximum allowable current peak through the n-mos at over-current condition, a resistor radd, as shown in fig. 10, can be added between vcc pin and the drain of the n-mos.
ld7850 8 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 fig.10 from the above application, the equation for i ocp can be revised as below. add ds(on) ocp r r v 0 . 1 i + = select an n-mos that is capable to handle i ocp without inducing current breakdown when approaching the highest operation temperature. the external n-mos of large c oss (typical>60pf) can efficiently reduce noise between vcc pin and phase pin and prevent the ocp from false triggering. if necessary, users can put a capacitor between the drain and source of n-mos to enhance the anti-noise capability. shutdown mode the ld7850 will enter shutdown mode when the en voltage is logic low for more than 11ms. during shutdown, the suspend current for the device is less than 1.5ma (max). bootstrap capacitor selection in order to drive the external high-side n-mos effectively, users are required to connect a bootstrap capacitor from boot pin to phase pin. in further, capacitance at least greater than 10 times c iss of high-side n-mos is recommended to achieve optimum design. inductor selection the inductor is selected to enhance the overall efficiency. higher value of inductance will reduce the current ripple and minimize the inaccuracy of output current, caused by propagation delay from higher input voltage, lower output voltage, or light load situation. so, the inductance value for ld7850 is recommended in the range from 100 h to 780 h. furthermore, lower series resistance of inductor will improve the overall efficiency. the current rating of the inductor is also a concern in design. it?s recommended to select inductors with proper rating at least equal to or higher than ocp level. select an inductor that is capable to handle over-current without going into saturation when approaching the highest operation temperature. operating frequency for a given duty cycle d, both of inductance and switching frequency would determine the inductor ripple current, which is
ld7850 9 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 () ) v v ( d - 1 d t f 1 td d = ) vcc v 1 ( l f v i o o l ? = where f is the switching frequency cs d td r t l vcc v = hyst td v v v + = t d is the delay time of the signal path v td is the voltage ripple due to the delay time. v hyst is the hysteresis of comparator. v is the total voltage ripple due to delay time and hysteresis of comparator. the peak inductor current is: 2 i i i l o lpeak + = where i l is the inductor peak-to-peak current ripple the hysteresis window is between 56mv. delay time of the signal path is equal to 245ns example: vcc=50v, v o =32v (to drive 8 wleds), l=220 h, i led =350ma, ma 692 . 153 i khz 706 . 340 v v t ) d 1 ( d f mv 63 . 175 mv 112 mv 63 . 63 v v v l td d hyst td = = ? = = + = + = the recommended operating frequency is between 20khz and 450khz for ld7850. input voltage regardless of the voltage drop of the n-mos during n-mos turn-on, the duty-cycle calculation equation can be written as below, vcc v v d fd o + = where: f led o v v n v + ? = n is the number of leds. v led is the forward conduction voltage of led (v), and v fd is the forward conduction voltage of schottky diode (v). input capacitor selection the input capacitor must be connected to the vcc pin of ld7850 to maintain steady input voltage and filter out the pulsing input current. a capacitor of low esr is required here to minimize the noise. ceramic capacitors are preferred, but tantalum or low-esr electrolytic capacitors may also suffice. it may be necessary in some designs to add a small valued ceramic type capacitor in parallel with the input capacitor to prevent from ringing. since the input current is discontinuous in a buck converter, the current stress over the input capacitor is the concern when selecting the capacitor. for a buck converter, the rms value of the input capacitor current can be calculated by: ? ? ? ? ? ? ? ? ? = vcc v - 1 vcc v i i o o o cin_rms it indicates that when v o =1/2 vcc, cin is under the worst case of current stress, that is 0.5i o . output capacitor the ld7850 features hysteresis control method for led current. an additional output capacitor here would produce inrush current during start-up. therefore it?s not recommended to connect an output capacitor to the buck converter output terminal , and so to eliminate the delay effect. the control of the led current would then perform more precisely and it would save the board space and components. layout consideration ? keep the vdd bypass capacitor of 1 f very close to ic. (<5mm) ? keep the en bypass capacitor of 0.1 f (option) very close to ic. ? keep the vcc bypass capacitor of at least 10 f very close to ic. (<5mm)
ld7850 10 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 ? keep the buck converter diode and inductor close to the phase pin and no via is necessary. ? locate the feedback resistor as close to their associated pins as possible. and route away from switching nodes, such as phase, boot and gate pins. ? keep the high current path wide and short as possible.
ld7850 11 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 fig.11 recommended pcb layout bom list (v ccmax =70v, i led =330ma, 6-wleds) ref value part no. package vendor ld7850 msop-10 leadtrend c1 22 f/100v rubycon c2(option) 0.1 f/x5r/16v 0603 c3 1 f/x5r/16v 0603 c boot 47nf/x7r/25v 0603 d1 100v/1a sbm110pt smb chenmko d2 80v/250ma mmbd4448bpt sod-123 chenmko l 220 h/0.8a gdo0804-221m 0804 gotrend r cs 1.2 ? 0805 n-mos 100v/3.2a ap9997gk sot-223 apec
ld7850 12 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 package information sop-8 (ep) dimensions in millimeters dimensions in inch symbols min max min max a 4.801 5.004 0.189 0.197 b 3.810 3.988 0.150 0.157 c 1.346 1.753 0.053 0.069 d 0.330 0.508 0.013 0.020 e 1.9 2.7 0.075 0.106 f 1.194 1.346 0.047 0.053 g 1.9 3.6 0.075 0.142 h 0.178 0.229 0.007 0.009 i 0.102 0.254 0.004 0.010 j 5.791 6.198 0.228 0.244 m 0.406 1.270 0.016 0.050 0 8 0 8
ld7850 13 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 msop-10 dimensions in millimeters dimensions in inch symbols min max min max a 2.896 3.099 0.114 0.122 b 2.896 3.099 0.114 0.122 c 0.813 1.219 0.032 0.048 d 0.152 0.305 0.006 0.012 f 0.470 0.530 0.019 0.021 h 0.127 0.229 0.005 0.009 i 0.051 0.152 0.002 0.006 j 4.699 5.105 0.185 0.201 m 0.406 0.660 0.016 0.026 0 6 0 6 important notice leadtrend technology corp. reserves the right to make changes or corrections to its products at any time without notice. customers should verify the datasheets are current and complete before placing order.
ld7850 14 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 ir profile for smd devices 0 50 100 150 200 250 300 temp. (oc) time (sec.) ramp up 3oc/second max. 217oc 60 ~ 150 seconds peak temp. 260 -5/+0oc, 30 seconds (max.) preheat 60 ~ 120 seconds 260 217 ramp down 6oc/second max. item average ramp-up rate pre-heat (150 ~ 200c) time maintained above 217c peak temp. ramp-down rate required 3c(max) /sec 60~120 sec 60~150 seconds 260 +0/-5c 30 seconds 6c (max) /sec
ld7850 15 leadtrend technology corporation www.leadtrend.com.tw ld7850-ds-00a march 2010 revision history rev. date change notice 00 4/21/2009 original specification 00a 3/18/2010 package option: sop-8 (ep)

▲Up To Search▲

Price & Availability of LD7850GL

	To Download LD7850GL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .